DDR-II Command Stream Shows string of commands to one DRAM extent Shows string of commands to one DRAM extent RAS 2 delay of 1 clock results in a delay of 1 clock (no collision to avoid, no additional delay) RAS 2 delay of 1 clock results in a delay of 1 clock (no collision to avoid, no additional delay) Data gap of 1 command clock between RAS 1 /CAS 1 and RAS 2 /CAS 2 occurs later in time Data gap of 1 command clock between RAS 1 /CAS 1 and RAS 2 /CAS 2 occurs later in time Assumed: Page closed policy, tRCD=3, AL=2, CL=2, BL=4 CK RASCASRASCASRAS CAS 010 1 22 Data D 1 D 0 D 0 D 0 D 0
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