Specifications & Architecture SPE: (synergistic Processing Element) Dual issue, 128-bit 4-way SIMD –Vector Processing 4 Integer Units + 4 FP Units 8-,16-,32-bit Integer + 32-,64-bit FP 128x128-bit Registers 256KB Local-Store Memory (specially designed) –Caches are not used –Data & Instruction in LS
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