Implementation in Externally Tested Circuits 10/27/2010Test Time Optimization In Scan Circuits - MS Thesis Defense26 Asynchronous protocol [3] necessary for communication between Automatic Test Equipment (ATE) and Device Under Test (DUT) Unlike BIST circuitry, patterns are not generated on-chip at the rate of dynamic clock generated on-chip Synchronizer between ATE and DUT Toggles handshake signal when DUT is ready for scan-in ATE scans in and scans out next bit and synchronizer toggles handshake signal DUT accepts new scan-in bit [3] W.
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