Virtex2P XC2VP7 FPGA Editor View With All Wires
{"Image DocumentName": "Virtex2P XC2VP7 FPGA Editor View With All Wires", "Image ImageDescription": "4,928 slices. 44 BRAMs. 1 PowerPC. 11,627 logic sites. 2,653 tiles. 1,423,681 wires. 544,549 segments. Let\u2019s look at a sample device. I\u2019m going to pick a Virtex2P XC2VP7 for the sake of illustration, but the principles apply to other architectures as well. This device is relatively small, but it still includes nearly 5,000 slices, a bunch of BRAM, and a PowerPC. Since I\u2019ve already introduced the notion of tiles, let\u2019s zoom in on one of them.", "Image XResolution": "37", "Image YResolution": "37", "Image ResolutionUnit": "Pixels/Centimeter", "Image Software": "SlidePlayer", "Image YCbCrPositioning": "Centered"}