Cache and Memory Working Together http://www. cs. nmsu
{"Image DocumentName": "Cache and Memory Working Together  cs. nmsu", "Image ImageDescription": "TLB Tag. TLB Index. Cache Index. Byte Offset Let s put specific numbers on this: we ll try to read one byte from virtual address 0x1234abcd. The byte offset field contains d (bits 3-0 of the address). The cache index field contains 3c (bits 9-4 of the address). The TLB index field contains 2a (bits of the address). The TLB tag field contains 1234 (bits of the address). So now we go through the following steps: We look up translation 2a in the TLB and cache line 3c in the cache. We obtain the TLB tag from the TLB and the cache tag from the cache. We ask whether: The TLB entry is valid. The TLB tag is 1234 (that s the TLB tag from our virtual address. We have permissions to perform the requested access. The cache entry is valid. The cache tag from the cache entry matches the cache tag from the TLB entry. If the answer to all of the questions in Step 3 was yes , we ve both got a valid translation and a cache hit. We can either obtain our data from the cache or write our value to the cache.", "Image XResolution": "37", "Image YResolution": "37", "Image ResolutionUnit": "Pixels/Centimeter", "Image Software": "SlidePlayer", "Image YCbCrPositioning": "Centered"}